The nanoFAB is pleased to post the following opportunity at Norcada. The details of the position, including responsibilities, qualifications, experience, and education are listed in the following link:
The nanoFAB is pleased to announce the following position from the National Research Council Canada, supporting the Advanced Technology Fabrication (ATF) facility at the Quantum Nanotechnology Research Centre (Ottawa).
Please use the above link for more information and to apply for this position.
Career opportunity - icspi
The nanoFAB is pleased to announce the following three positions at icspi.
Semiconductor Manufacturing Engineer (Foundry and OSAT) - As Semiconductor Manufacturing Engineer at icspi, you will work on manufacturing technology from CMOS to MEMS processing to packaging to enable entirely new nanoscale imaging technology.
Semiconductor Packaging Engineer - Own the packaging solution for MEMS devices from concept to qualification (dicing, die attach, interconnect). Mostly supplier engagement, some cleanroom.
R&D Application Engineer - Develop characterization protocols for customer samples and push AFM hardware to its limits through novel drive methods, calibration, and data analysis.
For more information about these listings and other job openings, please visit www.icspicorp.com/careers.
About icspi
icspi is building the future of nanoscale imaging.
We’ve revolutionized atomic force microscopy (AFM) by miniaturizing it by a factor of 1,000,000× compared to traditional systems: integrating all the components of an AFM onto a single CMOS chip, which we call microAFM.
Our core tech is field-proven and powers our desktop instruments that are used by scientists and engineers in over 40 countries.
Now we are using our core tech to solve throughput-resolution gaps in the semiconductor industry: catching nanoscale defects to enable new processes and prolong Moore's Law.
Today, scanning a wafer with AFM would take about 70 years. By using thousands of microAFMs in parallel, we can scan a wafer in a matter of hours.
The nanoFAB is happy to announce the installation of a Disco DFL7340 Stealth Dicer into our 10k cleanroom space—only the second tool of its kind in Canada. Compared to mechanical dicing, stealth dicing has substantially less chipping and is able to "cut" dry. With no water present, MEMS wafers or other sensitive substrates can now be safely diced at the end of their processing, without the need for a photoresist layer to protect the surface. Our DFL7340 is equipped with a SDE03 stealth dicing engine, dedicated to dicing Si substrates only.
The Disco DFL7340 stealth dicer
The stealth dicing process uses a ns-pulsed near infrared laser to create subsurface lines of voids and microcracks within the bulk Si; several lines at different depths and powers are typical in an optimised recipe. Crack propagation from these laser-modified lines singulate the wafer into individual dies—in this way, stealth dicing is more akin to "controlled cleaving" than sawing, with next to no material being removed from the dicing street (kerf loss). Compared to mechanical dicing, with its typical blade kerfs of 10s to 100s of µm, stealth dicing can therefore produce substantially less cutting waste, which in some cases can allow for more dies to be fit on a wafer. This process is also appropriate for samples that may be susceptible to contamination, as fewer particles are generated during stealth dicing vs. mechanical dicing.
Cross-sectional image of a 525 µm thick Si wafer after stealth dicing. Note that 6 passes were used to singulate a wafer of this thickness.
After dicing, a die expander is used to separate the dies after singulation to allow for "chipping-free" dies.
Edge quality of a Si chip after stealth dicing: note the nearly perfect edge and lack of contamination.
Edge quality of a Si chip after mechanical dicing: note the chipping and contamination (particles).
Wafer Expansion
Typically, for a well-optimised recipe, the dies are already fully singulated after the stealth dicing process. With near-zero kerf loss, however, the dicing lines are not easily seen until after the tape is expanded.
100 mm Si wafer after stealth dicing. Note how the dicing lines are not apparent.
The same 100 mm Si wafer after expansion.
Die expansion of a 100 mm stealth-diced Si wafer
Unique Geometries
Because of the nature of stealth dicing, unique geometries such as hexagons are now possible—something impractical to do by mechanical dicing, where only continuous cuts across the substrate are generally possible. As the laser can be programmed to start and stop throughout the cut, producing arbitrary dashed lines, there are far more possibilities for design layout.
A stealth-diced 150 mm diameter Si wafer with a unique geometry only possible by stealth dicing
Want to know more?
Over the coming weeks, staff will be working to fully commission the tool to open for staff-only processing project submission; user training is not being offered on this tool at this time. Additional information on specimen compatibility can be found on the tool page. If you think that stealth dicing is a viable process to add to your fabrication workflow, please reach out to Aaron Hryciw (ahryciw@ualberta.ca) or Breanna Cherkawski (bcherkaw@ualberta.ca).
Career Opportunity - University of Windsor / Teledyne MEMS
The nanoFAB is pleased to post the following postdoctoral position from the University of Windsor and Teledyne MEMS. As part of this position, the successful applicant will conduct fabrication research activities at the nanoFAB.